Threshold voltage reliability and trap modelling in silicon carbide MOS capacitor under high temperature

Threshold voltage reliability and trap modelling in silicon carbide MOS capacitor under high temperature

LI, JINGLIN (TU Delft Electrical Engineering, Mathematics and Computer Science)

Vollebregt, S. (mentor)
Romijn, J. (graduation committee)
Zhang, Y. (graduation committee)
van Swaaij, R.A.C.M.M. (graduation committee)

Delft University of Technology

Electrical Engineering

2022-10-17

To extend Moore’s law, silicon carbide devices attend the researcher’s attention due to their irreplaceable advantages such as high critical breakdown electrical field, wide bandgap and excellent thermal conductivity without sacrificing too much charge carrier mobility. However, the defects on the SiC-oxide interface degrades the performance of the device and even get worse at high temperature, such as the threshold voltage shifting problems, limiting the design of the integrated circuits. The thesis models, characterise, analyses, measures and extracts the traps of SiC MOSCAP, to understand the trapped charge transportation and unreliability mechanism under high temperature.
Effectively using SiC materials necessitates the need to understand the physical properties itself. Due to the large bandgap, the inversion layer cannot be observable in low frequency C-V measurement. The electrical field, space charge region, surface potential and C-V curve in SiC devices all differ from Si devices. More importantly, the trapped charges fluctuate the surface potential of the SiC devices. To give insight into the mechanism governing the trapped charges, the mathematical solution of the trapped charges in the whole bandgap is solved.
To be specific, the trap behaviour at a single energy level is then followed. A nonzero transient current is generated due only to the capture and release of the trapped charges when the equilibrium condition is broken. The trapped charges with high energy are thermalized and an equivalent admittance is obtained which further be split into a capacitance and a conductance.
Rising temperature activates the dopant atoms that are not ionised, and the Fermi level shifts towards the midband. The variation of equivalent circuit components and physical parameters responds to the temperature. High temperature expands the SiC crystal and the trapped charges are easy to receive energy from phonons so that the interaction between traps and the conduction band is enhanced and more empty states are waiting for the recombination of the charge carriers.

Silicon carbide
Near interface trap
Temperature dependence
Threshold voltage

http://resolver.tudelft.nl/uuid:07e12184-835e-401a-9a16-b640d264507c

2023-10-17

Student theses

master thesis

© 2022 JINGLIN LI