Print Email Facebook Twitter Low-power deep sub-micron CMOS logic: Sub-treshold current reduction Title Low-power deep sub-micron CMOS logic: Sub-treshold current reduction Author Van der Meer, P.R. Contributor Roermund, A.H.M. (promotor) Faculty Electrical Engineering, Mathematics and Computer Science Date 2003-01-14 To reference this document use: http://resolver.tudelft.nl/uuid:0b13448a-141a-4fcb-a23a-aab1975ea700 ISBN 90-9016408-1 Part of collection Institutional Repository Document type doctoral thesis Rights (c) 2003 P.R. van der Meer Files PDF emc_meer_20030114.PDF 6.68 MB Close viewer /islandora/object/uuid:0b13448a-141a-4fcb-a23a-aab1975ea700/datastream/OBJ/view