Advanced Breakdown Modeling for Solid-State Circuit Design

Advanced Breakdown Modeling for Solid-State Circuit Design

Milovanovi?, V.

Nanver, L. (promotor)

Electrical Engineering, Mathematics and Computer Science

Department of Microelectronics and Computer Engineering

2010-07-07

Modeling of the effects occurring outside the usual region of application of semiconductor devices is becoming more important with increasing demands set upon electronic systems for simultaneous speed and output power. Analog integrated circuit designers are forced to enter regimes of transistor operation that are close to or within the device breakdown. They use compact models that describe device behavior in an efficient way to predict a designed circuit performance. Using modern heterojunction bipolar transistors with superb maximum unity current gain and maximum unity power gain frequencies, necessarily brings with it ever lower breakdown voltages. Impact ionization that causes avalanche multiplication has a profound impact on power amplifiers and plays a dominant role in the region of high output voltages, necessary for driving antennas of modern (ultra)wideband wireless systems. On the other hand, digital circuit designs mostly suffer from high transistor leakage current that in the state of the art digital solutions takes up significant portion of the total power dissipation of a digital system. Therefore, it is of essence for digital integrated circuit designers to posses an accurate prediction of the leakages so that they may continue to grasp benefits of transistor downscaling. In this thesis, starting from impact ionization, firstly, physics behind this phenomenon is studied. Frequency limitations of avalanche models are analytically derived in Chapter 2. A derivation is followed by the description of usual approaches for addressing impact ionization effects in semiconductor devices. Emphasized is the most frequently used, impact ionization rates approximation. The last part of the chapter is reserved for compact modeling of avalanche multiplication in semiconductor devices. This chapter presents a foundation for the two chapters that follow. Chapter 3 focuses on quasidistributed bipolar transistor model reduction techniques. This model type is employed to describe complex multidimensional vertical current pinch-in effects that may occur in transistors biased within the avalanche region. A simplification method for the model is introduced, based on an implementation of bilinear approximation. Excellent matches between the original and reduced model are obtained. The model complexity is reduced from quadratic to linear dependency on size, nevertheless, the speed gain is not that dramatic. Implications of impact ionization on bipolar transistors in terms of working in the small alternating signal environment are explored next. Specifically, in such cases avalanche characterization is important in order to proceed with deeper analysis. Chapter 4 gives a derivation proof that avalanche in the small signal drive conditions may be studied by observing the real parts of admittance parameters when transistor is viewed through its two-port network representation. Addressed are the needs for an accurate modeling of such regimes. Repercussions of avalanche on some important intrinsic active device properties from circuit design prospective are discussed in general. Collapse of unilateral power gain and increase of transistor stability are demonstrated and physically explained through the concept of intrinsic avalanche-induced negative feedback. The frequency above which avalanche effects in small signal conditions can be neglected is identified. A description of a novel model for the band-to-band tunneling current in p-n junctions is shown in Chapter 5. The presented work consists of the model physical foundations, implementation and finally its verification against state of the art industrial and modern in-house device measurements. The developed tunneling breakdown model is fully physics-based and may be used both in bipolar as well as in field-effect compact transistor models. It is smooth in a mathematical sense on a whole real domain, thus escaping any potential solver convergence problems. The derived model features increased efficiency without compromising accuracy since it is not evaluated in the forward bias regime where the Zener tunneling current identically equals zero. Innovative parametrization of the model equation (in a statistical sense) drastically reduces the influence of randomness inevitably present in the measured data on which parameters are estimated, on dispersion of the extracted parameter values. As a consequence scaling over geometry and temperature is greatly improved. Parameter extraction techniques in compact modeling in general have a crucial role. However, if several extraction methodologies for estimation of certain model parameter(s) exist, it is not trivial to select the best, that is, the preferred one. It is even unclear how ``the best'' strategy should be defined. Chapter 6 is devoted to this important topic, namely the analysis of parameter extraction strategies and parameter optimization. Since this thesis concentrates on modeling of breakdown phenomena that are driven by the electric field within the p-n junction's space charge region, accent is drawn to the p-n junction parameters and their estimation methodologies. More precisely, obtaining parameters of the depletion capacitance and ideal diode current compact model parameters is covered in detail. The estimation strategies are compared in statistical terms which provide an insight in how the two, or more, can be assessed and compared, and which one would be more suitable for use in practice. In particular, it is demonstrated that it is much favorable to extract parameters simultaneously with their (temperature) scaling parameter rather than separately. Additionally, an approach to assess statistical properties of an arbitrary parameter extraction strategy and demonstrate the merits of such assessments is presented.

avalanche
breakdown
circuit design
compact model
modeling
p-n junction
parameter extraction
statistical analysis
transistor
tunneling
Zener

http://resolver.tudelft.nl/uuid:117aa738-99ea-4357-b880-769b58c84d97

TU Delft

9789085705833

Institutional Repository

doctoral thesis

(c) 2010 Milovanovi?, V.