Print Email Facebook Twitter Substrate Crosstalk Suppression Using Wafer-Level Packaging: Metalized Through-Substrate Trench Approach Title Substrate Crosstalk Suppression Using Wafer-Level Packaging: Metalized Through-Substrate Trench Approach Author Sinaga, S.M. Contributor Burghartz, J.N. (promotor) Bartek, M. (promotor) Faculty Electrical Engineering, Mathematics and Computer Science Department Microelectronics & Computer Engineering Date 2010-10-06 Abstract The demand for miniaturization technology has been increasing over the last decades. Consumer electronics end-users often, if not always, go for more functionality and practicality. This is translated into systems that are more complex and yet smaller in size such as smart cellular phones and portable audio/video systems. System on Chip (SoC) is still a solution preferred by many. The SoC comprises of many different circuit blocks that fall into two categories namely analog/RF and digital. The integration of the analog/RF circuitry and digital circuitry on the same silicon substrate has yet another challenge to cope with. The noise generated from the switching activity of the digital circuitry is injected into the silicon substrate, which then can propagate to the sensitive analog/RF circuitry. Such substrate noise can significantly degrade the functionality of the analog/RF circuitry, thus deteriorating the performance of the entire electronic system. In this thesis, a method to isolate the noise generating circuit block from the noise sensitive circuit block is proposed and demonstrated. The proposed method is based on through-substrate trench isolation scheme to suppress the substrate noise. The idea behind this isolation scheme is to create a full through-substrate trench that physically separates the noise agressor from the victim. This idea is very simple and effective. The through-substrate trench is achieved by means of wafer-level packaging (WLP) technology and consists of only a few additional fabrication steps that can readily be incorporated in the WLP processing flow. In a few words, it can be described as follows: the silicon substrate is first bonded to a spacer substrate, e.g. AF-45 glass or High-Resistivity Polycrystalline Silicon (HRPS). Then, the bonded wafer stack is turned upside down before being thinned down. The next step is to create the through-substrate trench by means of KOH etching. At this stage, we now have an air-filled through-substrate trench. This isolation scheme can be further improved by metalizing the trench resulting in a backside metal plane. The backside metal can then be connected to ground to drain the substrate noise. This is called grounded-metalized through-substrate trench. In this work, we have successfully fabricated and measured several devices, i.e. control device (without isolation), air-filled trench device, and metalized trench device. At 50 MHz air-filled trench provides around 55 dB isolation with respect to control device, whereas the metalized-trench provides additional isolation of 7 dB. At 10 GHz air-filled trench provides around 10 dB isolation with respect to control device, whereas the metalized-trench provides additional isolation of 23 dB. At 40 GHz air-filled trench provides around 2 dB isolation with respect to control device, whereas the metalized-trench provides additional isolation of 20 dB. Subject substrate crosstalk suppressionwafer-level packaging To reference this document use: http://resolver.tudelft.nl/uuid:215714d3-63dc-48e4-ac11-39484cb120ac Embargo date 2011-02-09 ISBN 9789085706007 Part of collection Institutional Repository Document type doctoral thesis Rights (c) 2010 Sinaga, S.M. Files PDF SaoerSinagaThesis.pdf 3.17 MB Close viewer /islandora/object/uuid:215714d3-63dc-48e4-ac11-39484cb120ac/datastream/OBJ/view