Optimizing Multicore System Performance Using Dynamically Reconfigurable Architectures on FPGAs

Optimizing Multicore System Performance Using Dynamically Reconfigurable Architectures on FPGAs

Guledal Lakshamana, Prashanth (TU Delft Electrical Engineering, Mathematics and Computer Science)

Al-Ars, Zaid (mentor)
Wong, Stephan (graduation committee)
van Leuken, Rene (graduation committee)

Delft University of Technology

Computer Engineering

2018-08-20

Processor architecture is continuously evolving. As the trend predicted by Moore's law is nearing its end, the focus of designing processors has shifted from high-frequency single-core systems to the medium frequency multicore system to a relatively lower frequency many-cores system, in the hope of extracting more performance while keeping power consumption in check. To satisfy a spectrum of applications, modern processors employ central processing units (CPUs) for serving a wide variety of general-purpose applications, while general purpose - graphics processor units (GP-GPUs) are used for highly parallel applications. This thesis provides an alternative, called dynamic platform, by switching between a sequential processor for serving sequential applications and parallel processor for serving parallel applications on a Zynq FPGA (Field Programmable Gate Array). The first part of this thesis analyses and designs the model with suitable simulations to know the trade-offs. From the model, it is clear that towards the extreme ends of the application spectrum where either high level of parallelism exist or high level of sequential operations exist, GPU and CPU respectively outperform the dynamic platform. However, there exists a region suitable for the dynamic platform where the applications are neither too parallel nor highly sequential. To implement the model on FPGAs, suitable open-source softcores are researched and selected. ρ-VEX dual-core and Microblaze softcores are implemented for catering to sequential applications, and ρ-VEX many-core softcore is implemented for serving parallel applications. These softcores are evaluated against three benchmarks-- Image processing (parallel), CRC (sequential) and Hash (sequential). Finally, the dynamic platform analysis is done, and the results prove that on average the performance on the dynamic platform is better than considering either the sequential (ρ-VEX dual-core) or parallel (ρ-VEX manycore) platform alone. The speedup of the dynamic platform ranges from 1.45 to 2.9 (average: 1.61) with respect to sequential platform and from 1.02 to 1.60 (average: 1.44) with respect to parallel platform. In the current state of FPGA technology, the dynamic platform does not perform better than CPU and GPU on average for the considered benchmarks. The result is a fully functional open-source dynamic platform, which can switch between two (or three) architectures at run-time, depending on the application characteristic (sequential or parallel).

Dynamic Reconfiguration
Multicore Optimization

http://resolver.tudelft.nl/uuid:81fa48bb-6c26-4552-bde1-807084ef4456

Student theses

master thesis

© 2018 Prashanth Guledal Lakshamana