Implementation, Characterization, and Optimization of an FPGA-based Time-to-Digital Converter

Implementation, Characterization, and Optimization of an FPGA-based Time-to-Digital Converter

Menninga, L.H.

Charbon, E. (mentor)

Electrical Engineering, Mathematics and Computer Science

EWI

Circuits and Systems

2011-05-30

Many fields need high performance time measurements, including Single-Photon Avalanche Diode (SPAD) cameras, Positron Emission Tomography (PET) systems, and other time-of-flight systems. These measurements are often performed by means of time-to-digital converters, that for these applications, require high resolution, accuracy, and throughput. This is often accomplished using custom circuitry, which entails high cost, long development time, and low flexibility. Other time measurement implementations, such as TDCs implemented on field-programmable gate arrays (FPGAs), have been studied to meet the demands of time measurement without the drawbacks of custom circuitry. This thesis presents an FPGA-based TDC with many advantages of custom circuitry but few of the drawbacks. A characterization of the TDC, based on a Virtex-6 FPGA, is executed and many influences on performance are described, including distortions from the FPGA architecture, temperature effects, intra-chip position variation, and chip-to-chip variation. The TDC has 10ps resolution, 3.85LSB integral non-linearity, and a throughput of 300MS/s. Some directions for future work are presented, with the possibility to improve FPGAbased TDCs even more. The results show that FPGA-based TDCs can achieve high performance, and can be used in a wide range of applications requiring high throughput and accurate time measurements.

TDC
FPGA
Virtex-6
High Throughput
Multi Channel
Open Source
10ps
PET

http://resolver.tudelft.nl/uuid:8828f052-dea4-4b8f-a03c-2c7d237fd3ab

Student theses

master thesis

(c) 2011 Menninga, L.H.