Print Email Facebook Twitter Low-Cost Smith-Waterman Acceleration Title Low-Cost Smith-Waterman Acceleration Author Ça?layan, F.H. Heij, R.W. Geers, M. Contributor Al-Ars, Z. (mentor) Faculty Electrical Engineering, Mathematics and Computer Science Department Microelectronics & Computer Engineering Programme Computer Engineering Date 2013-07-21 Abstract Due to advancing technology, genetic sequencing has become cheaper over the years. This has caused the demand for computational power to grow even faster than Moore's law. To remedy this problem, we analyzed low-cost hardware solutions to parallelize the computational part of the genetic sequencing. We proposed a novel method for calculating the score matrix of the Smith-Waterman algorithm, which solves the bandwidth bottleneck in earlier solutions. This method calculates the score matrix differentially and a buffer keeps track of the maximum value. Due to the nature of the Smith-Waterman algorithm, the resulting implementation can do the calculations fully in parallel. Since it fits on an Artix 7 XC7A200T chip 908 times, this leads to more than a twelve-fold improvement in performance/price compared to modern supercomputing platforms. Subject FPGAaccelerationSmith-WatermanDNAanalysislow-costhardware To reference this document use: http://resolver.tudelft.nl/uuid:9153ff2c-13c5-4be0-8446-fe33b88ab274 Embargo date 2013-08-16 Part of collection Student theses Document type bachelor thesis Rights (c) 2013 Ça?layan, F.H.Heij, R.W.Geers, M. Files PDF Graduate_ThesisFINALFINALFINAL.pdf 926.05 KB Close viewer /islandora/object/uuid:9153ff2c-13c5-4be0-8446-fe33b88ab274/datastream/OBJ/view