Print Email Facebook Twitter On Basic Boolean Function Graphene Nanoribbon Conductance Mapping Title On Basic Boolean Function Graphene Nanoribbon Conductance Mapping Author Jiang, Y. (TU Delft Computer Engineering) Cucu Laurenciu, N. (TU Delft Computer Engineering) Cotofana, S.D. (TU Delft Computer Engineering) Date 2019 Abstract In this paper, we augment a trapezoidal Quantum Point Contact topology with top gates to form a butterfly Graphene Nanoribbon (GNR) structure and demonstrate that by adjusting its topology, its conductance map can mirror basic Boolean functions, thus one can use such structures instead of transistors to build carbon-based gates and circuits. We first identify by means of Design Space Exploration specific GNR topologies for 2- and 3-input {AND, NAND, OR, NOR, XOR, XNOR} and demonstrate by means of the Non-Equilibrium Green Function - Landauer based simulations that butterfly GNR-based structures operating at V DD = 0.2 V outperform 7 nm @ V DD = 0.7 V CMOS counterparts by 2 to 3, 1 to 2, and 3 to 4, orders of magnitude in terms of delay, power consumption, and power-delay product, respectively, while requiring 2 orders of magnitude less active area. Subsequently, we investigate the effect of V DD variations and the V DD value lower bound. We demonstrate that the NOR butterfly GNR structures are quite robust as their conductance and delay are changing by no more than 2% and 6%, respectively, and that AND and NOR GNR geometries can operate even at 10 mV. Finally, we consider the aspects related to the practical realization of the proposed structures and conclude that even if there are still hurdles on the road ahead the latest graphene fabrication technology developments, e.g., surface-assisted synthesis, our proposal opens an alternative towards effective carbon-based nanoelectronic circuits and applications. Subject carbon-nanoelectronics.GNRGraphenegraphene-based Boolean Gates To reference this document use: http://resolver.tudelft.nl/uuid:9355af43-28c9-4d1d-a263-86f3c8fb78bc DOI https://doi.org/10.1109/TCSI.2018.2882310 ISSN 1549-8328 Source IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 66 (5), 1948-1959 Bibliographical note Accepted Author Manuscript Part of collection Institutional Repository Document type journal article Rights © 2019 Y. Jiang, N. Cucu Laurenciu, S.D. Cotofana Files PDF 48097514_08574057.pdf 57.39 MB Close viewer /islandora/object/uuid:9355af43-28c9-4d1d-a263-86f3c8fb78bc/datastream/OBJ/view