Print Email Facebook Twitter ASIC FFT processor for MB-OFDM UWB system Title ASIC FFT processor for MB-OFDM UWB system Author Li, N. Contributor Van der Meijs, N. (mentor) Faculty Electrical Engineering, Mathematics and Computer Science Date 2008-10-14 Abstract The physical layer (PHY) standard of Multi-band Orthogonal Frequency Division Multiplexing (MB-OFDM) Ultra Wideband (UWB) system was defined by ECMA International. In this standard, the data sampling rate from the analog-to-digital converter to the physical layer is up to 528 Msample/s. Therefore, it is a challenge to realize the physical layer of the UWB system-especially the components with high computational complexity in Very Large Scale Integration (VLSI) implementation. Fast Fourier Transform (FFT) block is one of these components. FFT plays an important role in Multi-band OFDM UWB system, which is the demodulation block of OFDM signals. The purpose of this project is to design an Application Specific Integrated Circuit (ASIC) FFT solution for this system. The specification is defined from the system analysis and literature research. All the design choices and considerations are concluded and explained.Based on the algorithm and architecture analysis, a novel Radix22Parallel processor is proposed, which is a small-area and low-power-consumption solution for MB-OFDM UWB system. Both Field Programmable Gate Array (FPGA) and ASIC targeted synthesis results of this architecture are presented. Subject asicdspfftuwbofdm To reference this document use: http://resolver.tudelft.nl/uuid:976d6f08-9fe6-4eae-a636-fd0b66d5f645 Publisher TU Delft, Electrical Engineering, Mathematics, Computer Science, Microelectronics Part of collection Student theses Document type master thesis Rights (c) 2008 N. Li Files PDF ewi_linuo_2008.pdf 1.8 MB Close viewer /islandora/object/uuid:976d6f08-9fe6-4eae-a636-fd0b66d5f645/datastream/OBJ/view