Wafer Scale Flexible Interconnect Fabrication for Heterogeneous Integration

Wafer Scale Flexible Interconnect Fabrication for Heterogeneous Integration

Li, J.

Liu, P. (mentor)
Van Zeijl, H.W. (mentor)
Zhang, K. (mentor)

Electrical Engineering, Mathematics and Computer Science

Microelectronics & Computer Engineering

ECTM

2015-10-26

System in a package (SIP) allows integrated circuit (ICs) modules or other components from different suppliers and technologies to be integrated into highly functional products. This SIP could realize miniaturized and multifunctional systems enabling emerging technologies like solid-state lightening (SSL), internet of things (IOT), etc. Due to the limitations of wire bond ,flip chip and RDL’s on high topography devices, Self-aligned Wafer Level Integration Technology (SAWLIT) based on PDMS has been reported by H. Sharifi in 2007 [1]. In this thesis a novel polymer-based SAWLIT and processing details are presented. Polyimide was chosen to be the flexible substrate for interconnects due to its high bending stiffness, high thermal and chemical stability, low dielectric constant and high mechanical strength. Two prototypes, down-contact and up-contact, have been developed for packaging with embedded cavities. Down-contact prototype utilizes isotropic plasma etching to create cavities underneath the interconnects. A plasma isotropic under etch study was carried out. The study includes the horizontal and vertical etch rates versus etch time and mask width. In up-contact prototype, flexible interconnects were initially fabricated on a sacrificial layer, then transferred to the device wafer with the help of temporary wafer bonding techniques and conductive glue. For the up-contact devices, prototypes were fabricated. Both liquid polyimide precursor and Kapton® film were used to produce polyimide flexible substrates with transferrable interconnect. Metal sheet resistance of such transferred interconnect were calculated and measured after transfer to evaluate the feasibility. These prototypes illustrate the potential of transferable interconnects to shorten the process time and to reduce cost.

wafer level integration
polyimide
isotropic dry etch
flexible interconnects
poly propylene carbonate
transferrable interconnect
temporary wafer bonding
packaging

http://resolver.tudelft.nl/uuid:c11e2b42-95d6-457a-a21d-a7a7a23385f6

Student theses

master thesis

(c) 2015 Li, J.