A Universal Fault Injector for Structural Simulation Environments

Smaller feature size, greater chip density, and minimal power consumption all lead to an increased number of faults in computing systems. Among these faults are soft errors. They are mainly caused by incident radiation. When a particle strikes a semiconductor and deposits enough energy along its path, charge builds up and the transistor temporarily has a different state. If this state is captured by a memory element such as a latch, the system can produce a faulty result. Due to the current technology trends ever decreasing the feature size and minimizing power consumption, reliability is becoming a serious concern in the current and future designs. More and more research is dedicated to fault tolerance of computing systems. One of the problems this research faces is a lack of adequate fault injection tools necessary to perform experimental evaluation of novel fault tolerance techniques. The best experimental setup would consist of a physical hardware placed into an appropriate environment. This is, however, in most cases not feasible due to extremely high cost, and also long time the experiments would require. Moreover, even if the manufacturing of the design is actually planned, the evaluation should be performed before the manufacturing. Hense, a simulation-based fault injection evaluation is necessary. Nowadays researchers usually implement their own fault injectors on simulation platforms they use for the design evaluation. This sometimes requires very much time and effort. A universal solution is very desirable, which could be easily adapted for different designs. Although it is impossible to create a fault injector compatible with all the existing simulators, there exist structural frameworks such as Unisim \cite{unisim}, that can be used for fast prototyping and are even able to interoperate with already existing simulators. This project focuses on creating a universal fault injector for the Unisim environment, which can be used in Unisim-based designs of different granularity with a minimal effort. It models transient and permanent types of faults, transient meaning single and multiple cycles. It can model single bit and multiple bit faults. It can be used for simulating memory and logic faults. The case studies show how the injector can be used when designing a superscalar processor with fault tolerance features. The fault injector can be implemented in an existing module of a simulator, or a new module can be placed in between existing modules. Different fault tolerance techniques are evaluated and compared using the fault injector.

Subject

Unisim
Fault injector
SER

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http://resolver.tudelft.nl/uuid:d1da3a56-14c5-4942-91a3-68e12a0e3103

Embargo date

2010-06-23

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Student theses

Document type

master thesis

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