Digital self-timed neuron design for Spiking Neuron Networks

Digital self-timed neuron design for Spiking Neuron Networks

Du, Tianyu (TU Delft Electrical Engineering, Mathematics and Computer Science)

van Leuken, T.G.R.M. (mentor)
Dalakoti, Aditya (graduation committee)
Bishnoi, R.K. (graduation committee)

Delft University of Technology

Electrical Engineering | Circuits and Systems

2023-01-31

Spiking Neural Networks(SNN) have been widely leveraged by neuromorphic systems due to their ability to closely mimic biological neural behavior, where information is exchanged and received between neurons in the form of sparse events(spikes). Such neuromorphic systems are highly energy-efficient because the use of a global clock can be avoided by asynchronous event-driven operations. Neurons, as the basic processing units of neuromorphic systems, are required to be low-power and high-speed for the implementation of complex networks. In this work, two fully event-driven digital Integrate-and-Fire(IF) neuron design is presented. Both design exploits the hierarchical structure, which allows the synaptic weights can be accumulated by local compute units in parallel. Instead of using handshake protocols, the proposed design generates on-demand event pulses to drive the weight accumulation, so we call it self-timed. Both neurons are designed by SystemVerilog and synthesized in TSMC 28nm technology. According to the synthesis results, both designs can finish the accumulation of 1024 6-bit weights within 100ns, with a power consumption of 0.055pJ per spike and 0.23pJ per spike respectively.

SNN
self-timed circuit
neuron
asynchronous logic

http://resolver.tudelft.nl/uuid:d575d76f-b3c0-4343-811b-4aaa3578f163

2025-02-01

Student theses

master thesis

© 2023 Tianyu Du