Towards high-level synthesis of neural models on FPGAs

Towards high-level synthesis of neural models on FPGAs

Al-Hilli, Z.Q.K.

Strydis, C. (mentor)
Isaza, S. (mentor)

Electrical Engineering, Mathematics and Computer Science

Microelectronics & Computer Engineering

Computer Engineering

2012-10-25

Recent trends in studying the brain activity have attracted interest in the simulation of neurons to understand the brain functionality. However, these simulations are computationally intensive and time consuming, which limits this study. High-performance FPGA-based platforms are being utilized to accelerate these simulations. However, the transformation of sequential code to a data flow graph, the scheduling of operations for an efficient use of resources, the generation of hardware description code, the simulation and synthesis are tedious and time consuming tasks. Furthermore, the design space is huge and various scheduling algorithms need to be evaluated based upon variants of area-delay cost metrics to make decisions. An open source tool has been developed at TUDelft to automate this process, which considerably reduces the implementation time. This tool allows us to schedule, plot, explore the design space and generate VHDL code. We have utilized this tool in order to implement in hardware, a detailed neural network model of the inferior olive module in the brain. In order to support the model's mathematical requirements, we have extended the tool with three more operations and added the support for floating-point arithmetic. Based on various cost metrics, two Pareto points were chosen for synthesis. The neural network model was synthesized at the granularity level of 1, 2 and 4 neurons. Performance analysis of the synthesis results shows that, in the best case, we were able to achieve a speedup of 80% over real-time execution for 500 neurons. We have also showed that using smaller neuron cells results in higher speedup and better area utilization.

high-level synthesis
Neural models
FPGA
Scheduling
DFG
VHDL
List
ASAP
ALAP
Pareto points

http://resolver.tudelft.nl/uuid:e7cf3e77-7b81-4028-8c7a-c2a62e94261b

2012-10-25

Student theses

master thesis

(c) 2012 Al-Hilli, Z.Q.K.