Print Email Facebook Twitter Varactor element and low distortion varactor circuit arrangement Title Varactor element and low distortion varactor circuit arrangement Author De Vreede, L.C.N. Faculty Electrical Engineering, Mathematics and Computer Science Date 2007-05-31 Abstract Varactor element (Dl; D2) having a junction region, in which the depletion capacitance of the varactor element varies when a reverse bias voltage is applied to the varactor element. The varactor element (Dl; D2) has an exponential depletion capacitance- voltage relation, e.g. obtained by providing a predetermined doping profile in the junction region. The varactor element (Dl; D2) can be used in a narrow tone spacing varactor stack arrangement, in which two varactor elements (Dl; D2) are connected in an anti-series configuration. A low impedance path for base band frequency components between a control node and each of two RF connection nodes is provided, while for fundamental and higher order harmonic frequencies, a high impedance path is provided. To reference this document use: http://resolver.tudelft.nl/uuid:ed65c5c8-3b0f-4931-8580-ccda7ed47db6 Publisher European Patent Office Source WO 2007061308 (A1) Is part of http://v3.espacenet.com/publicationDetails/biblio?adjacent=true&locale=en_EP&FT=D&date=20070531&CC=WO&NR=2007061308A1&KC=A1 Part of collection Institutional Repository Document type patent Rights (c) 2007 De Vreede, L.C.N. Files PDF WO2007061308A9.pdf 3.1 MB Close viewer /islandora/object/uuid:ed65c5c8-3b0f-4931-8580-ccda7ed47db6/datastream/OBJ/view