Print Email Facebook Twitter Scalable Real-Time Hardware for 2D Empirical Mode Decomposition Title Scalable Real-Time Hardware for 2D Empirical Mode Decomposition Author Van Breda, E.C.C. Contributor Van Genderen, A.J. (mentor) Jonker, P.P. (mentor) Faculty Electrical Engineering, Mathematics and Computer Science Department Embedded Systems Programme Embedded Systems Date 2013-12-16 Abstract This thesis describes the feasibility of implementing Empirical Mode Decomposition on an FPGA. Subject Empirical Mode DecompositionFPGAEMD To reference this document use: http://resolver.tudelft.nl/uuid:ede0a070-5f01-433b-bdea-bf8796cfcb45 Embargo date 2016-12-15 Part of collection Student theses Document type master thesis Rights (c) 2013 Van Breda, E.C.C. Files PDF scriptie.pdf 50.52 MB Close viewer /islandora/object/uuid:ede0a070-5f01-433b-bdea-bf8796cfcb45/datastream/OBJ/view