Print Email Facebook Twitter Control Challenges and Solutions for Power Factor Correction Title Control Challenges and Solutions for Power Factor Correction Author Does, Luc (TU Delft Electrical Engineering, Mathematics and Computer Science) Contributor Qin, Z. (mentor) van Doesburg, Mark (graduation committee) Degree granting institution Delft University of Technology Date 2019-06-14 Abstract In this thesis, the design and implementation of an improved current controller for grid-tied converters is discussed. Using this improved current controller, a power factor correction test platform achieves practically zero AC and DC error in steady-state. The power factor corrector accomplishes this by utilizing the parallel combination of a proportional-integral controller and a resonator to form the proportional-integral-resonant controller. The integrator in the controller has infinite gain at 0Hz while the resonator has infinite gain at the fundamental grid frequency. The extreme gain at these frequencies attenuates the error between reference current and actual current to practically zero. In prior art the proportional-integral-resonant (PIR) controller is implemented using the same resonator type that is also used in the well-known proportional-resonant (PR) controller. However, the use of this so-called cosine-form resonator might destabilize the closed-loop system. As a result, such a cosine-form resonator might not be the most suitable option to use in the PIR controller. This thesis researches the use of the sine-form resonator, which has been considered to be inferior to the cosine-form in prior art. The results show that the sine-form resonator can make a PIR controller perform better in terms of stability and disturbance rejection. Simulations and experimental results confirm that both the DC and AC steady-state error is attenuated to near zero, resulting in excellent tracking of the reference current. If multiple harmonic frequencies are present in the grid voltage, additional resonators can be implemented to attenuate these harmonics as well. The second contribution of this thesis focusses on the optimization for the numerically-controlled-oscillator used in the phase-locked loop in terms of computational load. By implementing the numerically-controlled-oscillator using a numerical resonator, an accurate but computationally efficient phase-locked loop is obtained. This originates from the fact that the numerical resonator integrates the angular frequency supplied by the loop filter in the complex plane. Experiments involving the phase-locked loop subroutine running on a Cortex-M4f microcontroller show an improvement in computation time of a factor of three compared to the use of trigonometric functions. In comparison to an implementation using a look-up table with interpolation, execution time is cut in half. The third and final contribution of this thesis focusses on the improvement of the voltage loop bandwidth. This is achieved by the implementation of an adaptive notch filter to remove the second-order harmonic voltage ripple from the DC bus voltage measurements. The notch filter is based on a second-order generalized integrator quadrature-system generator using the information supplied by the phase-locked loop to automatically tune the centre frequency to the second harmonic. Subject Power Factor CorrectionPFCControlproportional-integral-resonantResonatorGallium nitride deviceTotem-polePhase-locked LoopPLLNotch FilterSecond-order Generalized IntegratorSOGIProportional-resonant To reference this document use: http://resolver.tudelft.nl/uuid:f1891eed-9cc3-450f-ab5f-a4bc8b518b19 Part of collection Student theses Document type master thesis Rights © 2019 Luc Does Files PDF ThesisRepository.pdf 11.89 MB Close viewer /islandora/object/uuid:f1891eed-9cc3-450f-ab5f-a4bc8b518b19/datastream/OBJ/view