Title
Resistor-Based Digital-to-Analog Converters
Author
Nawrocki, Maciej (TU Delft Electrical Engineering, Mathematics and Computer Science)
Contributor
Bult, K. (mentor) 
Babaie, M. (graduation committee)
Sebastiano, F. (graduation committee)
Degree granting institution
Delft University of Technology
Programme
Electrical Engineering
Date
2023-11-27
Abstract
Transmit digital-to-analog converters have become an essential building block for state-of-the-art Ethernet infrastructures. They are also one of the most significant sources of power consumption in an Ethernet physical layer (PHY) transceiver. These devices must maintain high linearity and a well-defined impedance of 100 Ω while operating at a speed of several GS/s. This thesis investigates the resistive digital-to-analog converter architecture, which is inherently more power-efficient than the widely used current-steering architecture. A technique to linearize the supply current, which reduces distortion caused by finite supply impedance, is proposed. The resulting 12-bit DAC designed in 180nm technology maintains INL and DNL error of +-0.6 LSB on a 12-bit level across temperature (-40 to 150°C) and corners. The DAC operates with a clock speed of 200 MS/s, achieving IM3 >85 dB at low frequency.
Subject
Resistive DAC
Compensation
High-speed
High-linearity
Power efficiency
To reference this document use:
http://resolver.tudelft.nl/uuid:3aabdb19-9786-4f14-a61d-fd3f89e4a3e1
Embargo date
2025-11-27
Part of collection
Student theses
Document type
master thesis
Rights
© 2023 Maciej Nawrocki