SRAM power reduction: An ultra-low-power SRAM architecture in 45nm technology

Title

SRAM power reduction: An ultra-low-power SRAM architecture in 45nm technology

Author

Khawar Sarfraz, K.S.

Contributor

Doorn, T.S. (mentor)
Van der Meijs, N.P. (mentor)

Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Circuits and Systems

Date

2009-06-30

Subject

SRAM

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http://resolver.tudelft.nl/uuid:6bf48a02-371d-47fe-b642-a88f5c917a1d

Part of collection

Student theses

Document type

master thesis

Rights

(c) 2009 Khawar Sarfraz, K.S.