Print Email Facebook Twitter Interconnect schemes for stretchable array-type microsystems Title Interconnect schemes for stretchable array-type microsystems Author Sosin, S. Contributor Sarro, P.M. (promotor) Faculty Electrical Engineering, Mathematics and Computer Science Department Microelectronics & Computer Engineering Date 2011-04-06 Abstract Flexible systems can be found in many fields such as automotive electronics, computers and peripherals (hard drives, image scanners, ink-jet print-head cables), aerospace, consumer electronics (mobile phones, cameras etc), medical (hearing aids, pacemakers) and many others. Further reduction in size and new properties such as reversible stretchability, being able to cover various surfaces or biocompatibility can add new functionality to existing products and can facilitate the development of new ones. The proposed concept is based lateral segmentation of the monolithic silicon chip into functional blocks built on individual silicon islands. The fabrication process uses a post-processing module for converting monolithic silicon electronics into a large area system. The electrical connections between blocks are provided by a network of patterned for stretchability copper interconnects (mesh, meander and horseshoe shaped), allowing closely spaced array of IC dies can be expanded into a large-area system. A polydimethylsiloxane (PDMS) layer (Sylgard 184) is used for encapsulation, providing chemical and mechanical protection. Each array type consists of four 3 x 3 mm2 islands using two or four parallel stretchable conductive paths. Between the silicon islands are three identical stretchable areas. The maximum achievable elongation before failure is around 1200 ?m at a force of 1.6 N, resulting in an average maximum strain of one stretchable zone of 400 ?m. All stretchable areas have a similar length of 1200 ?m resulting in a maximum strain of ? ? 32.5 %. At maximum elongation, resistance increase varies from 6 % up to 8 %, depending on interconnect configuration. Cyclic testing showed that the number of cycles until failure decreases with increasing strain levels, samples being conductive for 1300 cycles for ?max = 5 % and 150 cycles for ?max= 25 %. The selected interconnect geometries showed small electrical resistance variation ((?R/R0)max = 8 %) for a strain level ?max = 30 %. Tensile testing of the fabricated arrays showed that strains up to 32 % are achievable but lower levels are sufficient for biomedical applications and applications related to the human body (such as medical implants, intelligent textiles), where typical strain levels consist of cyclic elongations of up to 5 %. Subject stretchable electronicsstretchable interconnectsflexible electronicsPDMS To reference this document use: http://resolver.tudelft.nl/uuid:7bc5c904-e31f-4753-b79c-a69157e6f6ae ISBN 9789053353905 Part of collection Institutional Repository Document type doctoral thesis Rights (c) 2011 Sosin, S. Files PDF Sebastian_Sosin_-_Interco ... _final.pdf 15.07 MB Close viewer /islandora/object/uuid:7bc5c904-e31f-4753-b79c-a69157e6f6ae/datastream/OBJ/view