Print Email Facebook Twitter Fingerprint Verification on the VEX Processor Title Fingerprint Verification on the VEX Processor Author Seedorf, R.A.E. Contributor Wong, J.S.S.M. (mentor) Anjam, F. (mentor) Faculty Electrical Engineering, Mathematics and Computer Science Department Microelectronics & Computer Engineering Programme Master of Science Computer Engineering Date 2010-09-24 Abstract The speed gap between a processor realized in Semi-custom ASIC technology and a processor realized in FPGA technology is narrowing. In processor design, the approach is to define the microarchitecture of the processor and to design and implement it for executing an application domain. In this thesis, we have investigated the approach to design a customized and parametrized VLIW processor, such that it becomes better suited for imaging applications. We analyzed the requirement of a fingerprint application. Porting the application to the VEX simulator required design and integration of an arithmetic module for emulating 64-bit arithmetic. Subsequently, the application was ported to the VEX simulator such that we could derive the set of architectural parameters for the VEX processor. Based on these parameters, we designed a pipelined and scalable VLIW processor according to the VEX ISA. Moreover, the design of the processor was implemented and realized in a Virtex-VI FPGA. Furthermore, to create the instruction memory for the VEX processor, the required toolchain was developed from the inherited development framework of the r-VEX project. For this purpose, we extended the back-end of the VEX compiler, re-designed the assembler, integrated the linker and the loader. The resulting toolchain allowed us to extract and execute the fingerprint application's bottleneck and three other benchmarks, on the VEX processor. Compared to the inherited development framework, the re-designed toolchain is more mature and better to utilize, as it is able to create the instruction ROM for the VEX processor. The Fibonacci benchmark results showed that the VEX processor is 3.32 times faster than the original multi-cycle r-VEX processor. Moreover, the results of three other benchmark indicate that our designed processor is able to execute a range of applications. Subject VLIWprocessorfingerprintverificationVEXtoolchainFPGA To reference this document use: http://resolver.tudelft.nl/uuid:ab90c888-bbbf-4f67-ba52-b9974b4577eb Embargo date 2011-03-26 Part of collection Student theses Document type master thesis Rights (c) 2010 Seedorf, R.A.E. Files PDF thesis.pdf 18.05 MB Close viewer /islandora/object/uuid:ab90c888-bbbf-4f67-ba52-b9974b4577eb/datastream/OBJ/view