A matrix-multiply unit for posits in reconfigurable logic leveraging (Open)CAPI

A matrix-multiply unit for posits in reconfigurable logic leveraging (Open)CAPI

Chen, Jianyu (Student TU Delft)
Al-Ars, Z. (TU Delft Computer Engineering)
Hofstee, H.P. (TU Delft Computer Engineering; IBM Research)

2018

In this paper, we present the design in reconfigurable logic of a matrix multiplier for matrices of 32-bit posit numbers with es=2 [1]. Vector dot products are computed without intermediate rounding as suggested by the proposed posit standard to maximally retain precision. An initial implementation targets the CAPI 1.0 interface on the POWER8 processor and achieves about 10Gpops (Giga posit operations per second). Follow-on implementations targeting CAPI 2.0 and OpenCAPI 3.0 on POWER9 are expected to achieve up to 64Gpops. Our design is available under a permissive open source license at https://github.com/ChenJianyunp/Unum_matrix_multiplier. We hope the current work, which works on CAPI 1.0, along with future community contributions, will help enable a more extensive exploration of this proposed new format.

Dot-product
Matrix-multiplier
Posit number
OA-Fund TU Delft

http://resolver.tudelft.nl/uuid:bd3e00af-5b89-4543-9204-2c6c0f264928

https://doi.org/10.1145/3190339.3190340

Association for Computing Machinery (ACM)

978-1-4503-6414-0

Proceedings of the Conference for Next Generation Arithmetic, CoNGA 2018

CoNGA 2018, 2018-03-28, Singapore, Singapore

Institutional Repository

conference paper

© 2018 Jianyu Chen, Z. Al-Ars, H.P. Hofstee