RRAM Variability and its Mitigation Schemes

RRAM Variability and its Mitigation Schemes

Pouyan, P. (TU Delft Computer Engineering; Universitat Politecnica de Catalunya)
Amat, Esteve (Universitat Politecnica de Catalunya)
Hamdioui, S. (TU Delft Computer Engineering)
Rubio, Antonio (Universitat Politecnica de Catalunya)

2016

Emerging technologies such as RRAMs are attracting significant attention, due to their tempting characteristics such as high scalability, CMOS compatibility and non-volatility to replace the current conventional memories. However, critical causes of hardware reliability failures (such as process variation due to their nano-scale structure) have gained considerable importance for having acceptable memory yields. Such vulnerabilities make it essential to investigate new robust design strategies at the circuit and system level. In this paper we have first reviewed the RRAM variability phenomenon and the variation tolerant techniques at the circuit level. Then we have analyzed the impact of variability on memory reliability and have proposed a variation-monitoring circuit that discerns the reliable memory cells affected by process variability.

RRAM
Reliability
Process Variability
Mitagation
Emerging Memory
Resistive Memory

http://resolver.tudelft.nl/uuid:dd499c04-5ee8-4884-9b54-69f7b4f6e756

https://doi.org/10.1109/PATMOS.2016.7833679

IEEE, Piscataway, NJ

978-1-5090-0733-2

26th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2016

26th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2016, 2016-09-21 → 2016-09-23, Bremen, Germany

Institutional Repository

conference paper

© 2016 P. Pouyan, Esteve Amat, S. Hamdioui, Antonio Rubio